GaP-on-Si-template technology

For the subsequent integration of III/V-material systems on CMOS-compatible Si (001) substrates these GaP-on-Si-templates serve as a perfect basis.

The GaP-on-Si-templates are widely used for production and development in the industry, research centers and universities for all kinds of applications, especially for the integration of optoelectronic III/V compound semiconductor material systems on silicon:

  • LEDs
  • Lasers
  • Optocoupling devices
  • Electronic systems and devices
  • Solar cells

With a lattice constant close to silicon, GaP is the material of choice as a basis for further epitaxial growth of III/V compound materials on silicon. Starting from this we have developed a high quality GaP layer with a defect free surface and an excellent smooth surface morphology. The GaP-on-Si-templates are free of misfit dislocations, threading dislocations, stacking faults, twins and are not disturbed by any anti-phase domains. The epitaxial layers have a high thickness uniformity and a high crystalline perfection.

We have optimized this technology on industrial CMOS standard 300mm substrates. A clean and particle free wafer exchange is guaranteed by the usage of the FOUP-cassette system.


Please contact us to discuss how we can support you according to your specific requirements and needs.

Final proof of concept:

Lasing of lattice-matched III/V compound semiconductor material monolithically integrated on (001) Si substrate.

Enter your email to see how it works (Download pdf file)

NAsP_GaP-on-Si_How-it-works.pdf (3 MB)

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Get in Contact

Michael Volk

Phone +49 (0) 6421 / 28-27042
michael.volk@nasp.de